Design Of Globally Asynchronous Locally Synchronous (GALS) System Based Scalable Heterogeneous Multi-Core System

Abstract

Scaling the number of cores,however, does not
essentially translate into an equal scaling of performance. we
propose several techniques to improve the performance scalability of
multicore systems. With those techniques we address numerous key
challenges of the multicore area. The system those are multi-core
has wide efficacy in Now-a-day’s applications due to a smaller
amount power consumption and high performance. According to the
different scalable architectures of heterogeneous multi-core system
those are made with different kinds of core, we have been presented
two different cores. First one is synchronous core design based that
is most accepted by digital system design methodology. Second one
is Globally Asynchronous Locally Synchronous core is a relatively
most recent design methodology of VLSI system that promises to
merge the advantages of synchronous and asynchronous designs. By
different partitioning strategy of the synchronous architecture it is
created.
To represent comparisons; a general purpose 8-bit synchronous
core was designed and then rehabilitated into GALS core. These
models were implemented in VHDL with Xilinx ISE 9.2 software
and simulated using ModelSim tool. The synthesis outcome show in
the same power utilization and a less area, GALS core outperformed
the core of operating frequency which is just about double the
operating frequency than the synchronous version. Globally through
the proposed and integrate these cores into a single integrated chip.
Generate a duel core system